Researchers at the Massachusetts Institute of Technology have developed Gleanmer, a novel system-on-a-chip that enables real-time three-dimensional environmental mapping for power-constrained autonomous devices. Presented at the IEEE Very Large-Scale Integrated Circuits Symposium, the chip addresses a critical bottleneck in micro-robotics and wearable technology by generating detailed 3D obstacle maps while consuming approximately six milliwatts of power. This energy footprint represents roughly two and a half percent of the power required by leading conventional mapping chips, opening new possibilities for lightweight drones, industrial inspection robots, and extended-wear augmented reality headsets. Traditional 3D mapping relies on volumetric pixels, or voxels, which demand substantial memory and computational resources to construct and process. To overcome these limitations, the MIT team engineered a hardware-software co-design strategy centered on a proprietary algorithm called GMMap. Rather than processing rigid voxel grids, the system utilizes Gaussian ellipsoids to represent environmental geometry. These adaptable shapes conform efficiently to curved surfaces, drastically reducing the memory overhead compared to traditional pixel-based methods. The algorithm generates highly accurate Gaussian representations from depth images in a single pass, immediately discarding raw camera data to minimize storage demands. By evaluating only neighboring pixels during construction, the system maintains a minimal memory footprint while preserving mapping fidelity. The Gleanmer chip architecture specifically optimizes this algorithmic approach for edge deployment. As autonomous agents navigate dynamic spaces, overlapping Gaussian representations inevitably form. Conventional systems resolve this by reprocessing raw pixel data, a computationally intensive step. Gleanmer bypasses this bottleneck by performing direct Gaussian fusion, operating exclusively on the compact geometric data. The chip houses these active Gaussian datasets within fast, on-chip memory arrays positioned immediately adjacent to the computational cores. This co-located memory architecture eliminates power-hungry data transfers to external storage, ensuring continuous, energy-efficient processing. During validation tests, the system successfully reconstructed diverse pre-existing environments and processed live video streams from standard smartphone cameras, maintaining real-time performance throughout. Beyond micro-robotics, the technology holds significant promise for augmented reality applications requiring prolonged wearability. By mapping obstacles and navigable free space with minimal latency and energy expenditure, Gleanmer allows battery-limited devices to execute collision-free path planning using less than twenty percent of the energy consumed by competing solutions. The research team, including EECS professor Vivienne Sze, aeronautics professor Sertac Karaman, and graduate researchers Zih-Sing Fu and Peter Zhi Xuan Li, plans to advance the architecture by positioning processing units closer to onboard sensors to further reduce data transmission overhead. Future iterations may also explore Gaussian-based representations for complex technical schematics, potentially enhancing artificial intelligence reasoning capabilities. By unifying algorithmic efficiency with specialized silicon, Gleanmer establishes a new benchmark for real-time spatial awareness in resource-constrained systems.