Skyworks Solutions, Inc. has introduced the SKY53510/80/40 family of clock fanout buffers, setting a new standard in ultra-low jitter performance for high-speed connectivity applications. Designed to meet the demanding timing requirements of next-generation data centers, wireless networks, and PCIe Gen 7 systems, the new family delivers exceptional signal integrity and scalability. As data rates continue to rise with the adoption of PCIe Gen 7, AI-driven workloads, cloud infrastructure, and 5G/6G wireless networks, precise clock distribution has become essential. The SKY53510/80/40 buffers address these challenges with industry-leading jitter performance, format flexibility, and power efficiency—helping system designers reduce development time, simplify integration, and future-proof their designs. The devices feature a 3:1 input multiplexer with support for crystal inputs, one single-ended output, and up to 10 differential outputs. Available in compact thermally enhanced QFN packages—7x7mm (10 outputs), 6x6mm (8 outputs), and 5x5mm (4 outputs)—they are pin-compatible with standard layouts, enabling easy integration and multi-sourcing across platforms. Key performance highlights include ultra-low additive RMS phase jitter of 35 fs at 156.25 MHz and just 3 fs at 100 MHz—critical for PCIe Gen 7 compliance. The buffers support a wide range of input and output formats, including LVPECL, LVCMOS, LVDS, HCSL, CML, SSTL, HSTL, and AC-coupled single-ended signals, with selectable output types such as LVPECL, LVDS, HCSL, or tristate. They operate with input slew rates as low as 0.75V/ns and support output levels of 1.8V, 2.5V, and 3.3V, minimizing signal integrity issues like reflection, crosstalk, and ground bounce. Additional features include low-power operation with separate core and output voltage supplies, integrated LDOs with over 70 dBc PSRR for improved noise immunity, and operation across a wide temperature range from -40°C to +95°C ambient (up to +105°C on board). The low noise floor of -166 dBc/Hz makes the buffers ideal for SyncE 156.25 MHz applications. The SKY53510/80/40 family is designed to work seamlessly with Skyworks’ broader portfolio, including the Si551x Network Synchronizers, SKY63104/5/6 jitter-attenuating clocks, and SKY62101 ultra-low jitter clock generators. Together, these components form complete clock tree solutions tailored for 6G wireless infrastructure, 800G/1600G networking, and AI data centers using 112G/224 PAM4 SerDes technology. Samples and production units are now available, with evaluation supported by the SKY53510-EVB development kit. For more information, visit Skyworks’ Any Format Clock Buffers page or contact a Skyworks sales representative. Skyworks Solutions, Inc. (Nasdaq: SWKS) is a global leader in high-performance analog and mixed-signal semiconductors, serving markets including cellular infrastructure, data centers, automotive, aerospace, industrial, and consumer electronics. The company is a member of the S&P 500® and operates engineering, manufacturing, and support facilities worldwide.