Smaller is better when it comes to next-generation memory technology, according to a new study by researchers at Science Tokyo. The team discovered that shrinking ferroelectric tunnel junctions (FTJs) significantly enhances their performance, making them more efficient and reliable for future data storage. This breakthrough could help meet the growing demands of artificial intelligence, edge computing, and the Internet of Things, which require faster, denser, and more energy-efficient memory solutions. Conventional flash memory, which stores data using electric charge, is nearing its physical limits. As devices get smaller, charge leakage and reliability issues become more pronounced. This has driven researchers to explore alternative memory technologies, with FTJs emerging as a strong contender. Unlike charge-based storage, FTJs use the direction of electric polarization in a thin ferroelectric layer—typically just a few nanometers thick—to represent data. This polarization controls electron tunneling through the barrier, creating two distinct resistance states: ON and OFF. These states enable non-volatile memory that retains data without power and operates with low energy consumption. The study, led by Professor Yutaka Majima from the Materials and Structures Laboratory at Science Tokyo, focused on hafnium oxide (HfO2)-based FTJs, which are compatible with existing semiconductor manufacturing processes. Using electron-beam lithography, the team fabricated nanocrossbar-type FTJs directly on silicon substrates. Each device features a titanium/titanium oxide top electrode, a 2–3 nm thick yttrium-doped HfO2 ferroelectric layer, and a platinum bottom electrode. The researchers tested these devices across a wide temperature range and at multiple scales. They found that as the junction area decreased, the resistance contrast between the ON and OFF states—known as the tunneling electroresistance (TER) ratio—increased dramatically. The smallest device, with a 25 nm junction width, achieved a TER ratio of 2,200, more than ten times higher than larger versions. Importantly, the team observed that electrons tunnel directly through the ferroelectric barrier in both states, even at low temperatures. This differs from earlier studies where leakage and thermally activated conduction dominated the OFF state, limiting performance. The new findings show that miniaturization does not degrade performance—it enhances it. “This result challenges the long-held belief that scaling down devices inevitably leads to performance loss,” said Majima. “Instead, aggressive scaling can be a powerful tool for improving memory efficiency and density.” The nanocrossbar design also enables high cell density and two-terminal addressing, making it ideal for scalable, three-dimensional memory architectures. The study provides a clear experimental roadmap for developing ultra-high-density, low-power memory systems that could power future AI accelerators, portable electronics, and IoT devices. Published in Nanoscale on January 2, 2026, the research marks a significant step forward in the development of next-generation non-volatile memory technologies.