XCENA, a four-year-old chip startup with operations in South Korea and the United States, has secured $135 million in Series B funding. This investment brings the company's total capital raised to $185 million and values the firm at $570 million. The funding validates XCENA's core thesis that the primary bottleneck in artificial intelligence is no longer raw computing power, but rather data memory architecture. The current AI infrastructure faces a significant inefficiency where data must travel from memory to a CPU for preprocessing, then to a GPU for heavy computation, and back again for every generated word. XCENA CEO Jin Kim explains that while CPUs and GPUs have evolved rapidly, memory technology has stagnated. This movement creates a structural bottleneck that consumes excessive power and increases costs. To address this, XCENA has developed the MX1 chip, which places compute capabilities directly adjacent to DRAM memory modules. By processing data near its source, the chip eliminates the need for costly round trips between separate processors and memory. The MX1 connects to the CPU via CXL, a dedicated high-speed link. This architecture allows the chip to handle data orchestration tasks, such as preprocessing and managing conversation context, directly within the memory module. Kim states that this approach is so efficient that workloads previously requiring ten servers could potentially be run on a single machine. The chip targets inference workloads, which rely heavily on memory rather than just matrix multiplication. Unlike traditional Neural Processing Units that compete with Nvidia for training tasks, XCENA focuses on the underlying memory-intensive layer. The founding team, including CEO Jin Kim, CTO Dohun Kim, and CPO Harry Juhyun Kim, are veterans of Samsung and SK Hynix. They aim to capitalize on the growing demand for memory solutions as global memory giants reach trillion-dollar valuations. The MX1 is currently in the prototype phase. Mass production is scheduled to begin on Samsung's foundry lines by the end of 2026, with revenue generation expected to start in 2027. XCENA differentiates itself from rivals like Astera Labs and Marvell through its use of thousands of RISC-V based cores. While competitors often rely on a handful of general-purpose cores, XCENA utilizes thousands of small, efficient cores optimized for data processing. The company also maintains vertical integration by designing its own internal memory hierarchy, interconnect buses, and DRAM controllers, a level of customization that many larger competitors outsource. The Series B round was co-led by Seoul-based venture capital firms Altinum and IMM Investment, alongside Corstone Asia, SBI Investment, and Mirae Asset Capital. The company, which employs over 90 staff across offices in Pangyo and Sunnyvale, continues to hold discussions with global memory vendors and international investors to further scale its technology for hyperscalers spending billions on AI infrastructure.