Fujitsu Unveils Monaka CPU With Stacked Cache and 256-Bit SVE2

Fujitsu presented the Monaka processor at Hot Chips 2026, revealing a multi-die CPU designed for green AI data centers and subsidized by Japan's New Energy and Industrial Technology Development Organization. The chip targets volume production in 2027, with evaluation samples currently available. Monaka employs a hybrid architecture split across three silicon tiers: a 2-nanometer core die from TSMC, a 5nm SRAM die holding the entire last-level cache, and a 5nm input/output die. The core die uses face-to-face hybrid bonding to stack directly atop the SRAM die, while the IO die connects via a silicon interposer. Fujitsu restricts 2nm silicon to less than 30% of the total die area, accelerating time-to-market by migrating components that scale poorly to the 5nm nodes. Low-dropout voltage regulators reside on the SRAM die beneath floating-point units to enable per-core dynamic voltage and frequency scaling. The processor features 144 cores, each equipped with two 256-bit SVE2 vector units and FP8/INT8 matrix support. This narrows the vector width from the 512-bit SVE implementation in the previous A64FX chip, a design choice intended to minimize core size and optimize cost-performance ratios for data center workloads. Monaka abandons high-bandwidth memory in favor of a 12-channel DDR5 interface running at 8000 MT/s. The core design incorporates mainframe-class reliability mechanisms, including error correction code or duplication on L1 and L2 caches, parity checks on execution units and registers, and a hardware instruction-retry mechanism. Each core measures approximately 1.47 mm2 and utilizes a three-level TAGE branch predictor with six arithmetic logic units. Fujitsu estimates performance for two SKUs: a 350W air-cooled model with a 2.1 GHz base clock and a 500W liquid-cooled variant at 2.9 GHz. The 350W part is projected to deliver 4,355 GFLOPS in DGEMM operations and 69.7 TOPS in INT8, while the 500W SKU reaches 6,013 GFLOPS and 96.2 TOPS, with both achieving approximately 500 GB/s in STREAM Triad bandwidth. The company claims up to double AI performance and over 50% total cost of ownership reduction against unnamed competitors, attributing efficiency gains to ultra-low-voltage operation running the core 30% below nominal voltage. In the server market, Monaka's 144-core configuration positions it in the mid-range, trailing higher-core-count solutions from AWS, Ampere, and Microsoft. However, its 256-bit SVE2 width exceeds the 128-bit vectors common in hyperscaler Arm cores. Despite being a domestically engineered design, Monaka relies on TSMC fabrication, underscoring the gap between Japan's sovereignty goals and current manufacturing dependencies. Japan is investing heavily in Rapidus for 2nm production, but Monaka predates domestic capacity. A successor, Monaka-X, is slated to be built entirely by Rapidus in Japan and will feature Arm SME2 support. Monaka-X is expected to power FugakuNEXT, a $750 million supercomputer system developed by RIKEN and Nvidia, targeting over 600 FP8 exaFLOPS of performance within a 40-megawatt envelope by approximately 2030.