Nvidia Unveils Vera Rubin Superchip with 88-Core CPU and Dual Rubin GPUs, Targeting 100 PetaFLOPS AI Performance for 2026 Launch
At its GTC keynote in Washington, D.C., Nvidia unveiled the Vera Rubin Superchip for the first time, showcasing a highly advanced computing platform designed for AI and high-performance computing (HPC). The system features two Rubin GPUs, Nvidia’s next-generation custom 88-core Vera CPU, and a densely packed architecture built on a thick printed circuit board that resembles a motherboard more than a traditional chip. Jensen Huang, Nvidia’s CEO, described the Vera Rubin Superchip as the next evolution of the Rubin architecture. “While we are shipping GB300, we are preparing Rubin to be in production this time next year, maybe slightly earlier,” Huang said. He emphasized the system’s performance, highlighting its 100 petaFLOPS of FP4 compute power for AI workloads—marking a significant leap in efficiency and scale. The Vera Rubin Superchip board is a complex assembly: the 88-core Vera CPU sits at the center, surrounded by SOCAMM2 memory modules using LPDDR technology. Two Rubin GPUs are mounted on either side, each covered by large rectangular aluminum heat spreaders similar in size to those on Blackwell GPUs. This suggests comparable thermal and power densities, though exact die sizes remain undisclosed. Markings on the Rubin GPUs indicate they were packaged in Taiwan during the 38th week of 2025—late September—confirming that Nvidia has been testing the hardware for months. The CPU itself appears to be a multi-chiplet design, with visible seams suggesting it’s composed of multiple dies rather than a single monolithic chip. The board’s design also reveals new details. Each Rubin GPU is made up of two compute chiplets, eight HBM4 memory stacks, and one or two I/O chiplets. Notably, the Vera CPU is now accompanied by a distinct I/O chiplet located adjacent to it. Green traces visible near the CPU’s I/O pads hint at potential external or embedded components, possibly enabling advanced I/O functions through sub-processor chiplets beneath the main die—though the exact purpose remains unclear. A key change in the Vera Rubin design is the removal of standard cabled connectors. Instead, the board features two NVLink backplane connectors on top to link the GPUs via a high-speed NVLink switch, enabling seamless scaling within a rack. Three connectors on the bottom edge handle power, PCIe, and CXL interfaces, supporting flexible integration into data center environments. The overall layout and construction suggest the Vera Rubin Superchip is well into final development. Nvidia expects the system to begin production in late 2026, with deployment in major data centers likely starting in early 2027. With its massive compute capacity and innovative packaging, the Vera Rubin Superchip positions Nvidia at the forefront of next-generation AI infrastructure.
