Intel recently provided insight into its High-NA EUV strategy during the Intel Foundry Direct 2025 conference, addressing critical concerns about the technology's cost and readiness. The company is set to introduce the new High-NA EUV chipmaking tool with its upcoming 14A process node, although it has not fully committed to using it in production. Instead, Intel has developed an alternative production flow for the 14A node that relies on standard Low-NA EUV, ensuring it has a backup plan in case the new technology encounters delays or cost issues. Dr. Naga Chandrasekaran, Executive Vice President, Chief Technology Officer of Operations, and General Manager of Intel Foundry Technology and Manufacturing, emphasized that Intel retains the flexibility to choose between Low-NA and High-NA EUV. Both options are design-rule compatible, meaning that customers won't need to adjust their designs regardless of Intel's final decision. This dual-path approach aims to minimize risks and maximize rewards by providing a proven, reliable alternative if the High-NA EUV machines do not meet expectations. High-NA EUV, or High Numerical Aperture Extreme Ultraviolet Lithography, is an advanced chipmaking technology designed to improve patterning precision and reduce the number of process steps needed to manufacture chips. The ASML Twinscan NXE:5000, a High-NA EUV machine, costs around $400 million and represents a significant investment for semiconductor manufacturers. Intel has already installed a second High-NA EUV tool at its Oregon fabrication facility and reports that the technology is advancing well. Despite this, the machines have not yet been used in a production environment, leading to cautious optimism and careful planning. Chandrasekaran highlighted that Intel has achieved yield parity between its Low-NA EUV and High-NA EUV production flows. Yield parity indicates that both methods produce chips with similar success rates, suggesting that the adoption of High-NA EUV would not significantly impact the manufacturing timeline or quality. However, using multiple passes with Low-NA EUV, such as triple-patterning, can be complex and requires precise alignment to achieve accurate results. Intel has invested heavily in improving overlay technology, which is crucial for aligning patterns across multiple exposures, to mitigate these complexities. The company plans to integrate High-NA EUV on only a limited number of layers for the 14A node, reducing the potential impact of any developmental issues. Chandrasekaran noted that High-NA EUV can simplify the manufacturing process by eliminating approximately 40 steps, which translates to cost savings. For example, a single pass with High-NA EUV can create a pattern comparable to what would typically require three exposures with Low-NA EUV. High-NA EUV can only print half of a reticle at a time, necessitating stitching to combine two prints into a full reticle. In contrast, Low-NA EUV machines can process a full reticle in a single print, making them more straightforward to use for smaller dies. Intel's strategic approach is informed by its past experiences, particularly the 10nm node fiasco, which stemmed from making too many simultaneous bets on new technologies. This setback led to a loss of its chipmaking lead over rival TSMC. To avoid similar issues, Intel is adopting a de-risking strategy for the 14A node, mirroring its approach with the 18A node. With the 18A node, the company introduced an industry-first backside power delivery system and gate-all-around (GAA) transistors, both of which were developed alongside a more conservative internal trial process without GAA. The successful development of these technologies allowed Intel to move forward with the full version of the 18A node. In contrast, TSMC has publicly stated that it will not use High-NA EUV with its equivalent A14 node, indicating a different risk tolerance and development timeline. Intel initially planned to use High-NA EUV with its 18A process but later shifted to the 14A node due to the rapid progress of the 18A node and the delayed readiness of the High-NA EUV machines. Industry insiders acknowledge Intel's cautious and strategic approach to High-NA EUV, recognizing that the technology's high cost and developmental challenges necessitate a balanced risk management strategy. While the upfront investment is substantial, the potential benefits in terms of reduced manufacturing complexity and cost savings could be significant. Intel's history of innovation and its commitment to maintaining customer trust through multiple production paths position the company well to navigate the complexities of next-generation chipmaking. Intel, founded in 1968, is one of the world's leading semiconductor manufacturers with a strong focus on cutting-edge technology and process innovation. The company's strategic flexibility in adopting new technologies like High-NA EUV is part of its broader mission to regain its competitive edge in the semiconductor industry.