Researchers from Peking University and the Shanghai Institute of Microsystem and Information Technology at the Chinese Academy of Sciences have developed a groundbreaking phase-change memory chip that enables in-memory computing for neural dynamical systems, dramatically accelerating complex 3D surface reconstruction tasks. The prototype, detailed in a recent Science publication, reduces brain cortex modeling time from several hours or seconds to just 0.43 seconds, outperforming conventional graphics processing units by a factor of fifty while consuming a fraction of the energy. Traditional computing architectures separate storage and processing, forcing data to shuttle between memory and arithmetic units. This bottleneck severely limits the efficiency of neural dynamical systems, which rely on continuous numerical integration to model shape evolution as a smooth, collision-free 3D mesh. The new chip circumvents this limitation by embedding computations directly within a forty-nanometer phase-change memory array. By exploiting the naturally occurring resistance drift of memory cells, researchers engineered a hardware-level mechanism to automatically adjust numerical integration step sizes. Rather than treating drift as a defect, the team harnessed it as a predictable, tunable control parameter, eliminating the need for external counters or comparators and shrinking computational circuitry to just 0.28 square millimeters. The architecture supports sixteen distinct resistance states, enabling dense weight storage and parallel multiply-accumulate operations without data movement. To ensure reliability across real-world conditions, the team integrated carbon-doped phase-change materials that maintain stable electrical characteristics across a zero to 70-degree Celsius range and sustain up to 10 to the 10th power write-erase cycles. A time-interleaved scheduling strategy further distributes wear across memory rows, extending the array operational lifespan well beyond individual device limits. Benchmark tests demonstrate the chip capabilities. A single iteration for complex 3D manifold generation completes in 2.12 milliseconds, running 36 times faster than the fastest comparable accelerators while using merely one-twenty-fourth of the power. A full brain surface reconstruction consumes approximately one-thousandth of the energy required to charge a smartphone, delivering sub-millimeter accuracy without mesh self-intersections or gaps. The technology holds immediate applicability in surgical navigation, real-time environment mapping for autonomous vehicles, augmented reality rendering, and digital heritage preservation. Led by Professor Yang Yuchao and Dr. Song Zhitang, with contributions from researchers Zhu Yixin, Tao Yaoyu, Cai Lei, Xie Chenchen, and Yan Longhao, the project marks a pivotal step toward practical in-memory computing. By transforming inherent material variability into a functional advantage, the design bypasses traditional von Neumann bottlenecks and validates phase-change memory as a scalable substrate for specialized AI and scientific workloads. While currently at the prototype stage, the architecture establishes a clear pathway for future scaling, peripheral optimization, and integration with larger machine-learning frameworks.