Cadence (NASDAQ: CDNS) has announced a significant expansion of its design IP portfolio, specifically tailored for Intel's 18A and 18A-P process technologies. During the Intel Foundry Direct Connect event, Cadence showcased its certification of digital and analog/custom design solutions for the latest Intel 18A process design kit (PDK). This strategic collaboration aims to drive innovation in artificial intelligence and machine learning (AI/ML), high-performance computing (HPC), and advanced mobile applications by leveraging Intel's cutting-edge RibbonFET transistors and PowerVia backside power delivery network. The newly added IPs to Cadence's portfolio include an 112G Extended Reach SerDes with exceptional bit error rate (BER) performance, a 64G Multi-Protocol PHY supporting PCIe 6.0, CXL 3.0, and 56G Ethernet, an LPDDR5X/5 memory controller with a data rate of up to 8533 Mbps, and a UCIe 1.0 advanced packaging interface supporting 16G rates. These IPs are particularly valuable for applications requiring the advanced performance and efficiency offered by Intel's 18A and 18A-P nodes. Furthermore, Cadence's comprehensive suite of AI-driven digital and analog/custom design tools has achieved Intel 18A PDK certification. This suite includes powerful tools like the Cerebrus® Intelligent Chip Explorer, Genus™ Synthesis Solution, Innovus™ Implementation System, Quantus™ Extraction Solution, Quantus Field Solver, Tempus™ Timing Sign-off Solution, and Pegasus™ Verification System. For custom IC design, tools such as the Virtuoso® Suite, integrated Spectre® platform, and Voltus™-XFi Custom Power Integrity Solution are also certified, covering the entire design flow from RTL to GDS. Cadence and Intel Foundry are committed to early design technology co-optimization to prepare for future Intel 14A-E advanced nodes. They have developed a workflow based on Intel's Embedded Multi-die Interconnect Bridge-T (EMIB-T) technology, which simplifies the integration of complex multi-die architectures. This workflow eliminates data translation, shortens the design cycle, and allows for early thermal, signal integrity, and power modeling, ensuring compliance and reducing risks. Cadence is also a founding member of the Intel Foundry Chiplet Alliance Program and continues to support the Intel Foundry Accelerator Alliance Program. These initiatives ensure that Cadence's solutions help customers deploy reliable and scalable paths for utilizing interoperable and secure chiplet solutions, tailored to specific application needs and market demands. President and General Manager of Silicon Realization at Cadence, Boyd Phelps, stated, “Cadence is at the forefront of driving next-generation AI, HPC, and mobile designs. Our collaboration ensures mutual customers can leverage our robust design IP and AI-driven digital and analog/custom solutions to achieve unparalleled performance and efficiency. The expanded IP portfolio provides optimal silicon solutions, with advanced standards implementation being crucial for scalable, high-performance designs. We look forward to continuing our partnership with Intel Foundry to build IP solutions that meet the demands of future AI factories and compute platforms.” Vice President and General Manager of the Intel Foundry Ecosystem Technology Office, Suk Lee, added, “Our ongoing collaboration optimizes solutions, combining Cadence’s innovative IP with Intel 18A and 18A-P technologies to bring advantages to AI/ML and HPC applications. Together, we are accelerating the development of high-performance solutions, including those for chiplets, to help our common customers improve PPA efficiency and speed up the introduction of innovative products.” Keysight Technologies and Intel Foundry have recently announced a cooperative effort to support the Embedded Multi-die Interconnect Bridge-T (EMIB-T) technology, aimed at enhancing high-performance encapsulation solutions for the AI and data center markets. As the complexity of AI and data center workloads increases, ensuring reliable communication between chiplets and 3D integrated circuits (3DICs) becomes essential. Key components of this initiative include high-bandwidth data transfer and efficient power management, which are critical for meeting the performance demands of next-generation semiconductor applications. To address these challenges, the industry is adopting emerging open standards such as the Universal Chiplet Interconnect Express (UCIe) and Bunch of Wires (BoW). These standards define interconnect protocols for advanced 2.5D/3D or laminate/organic packages, promoting consistency and high-quality integration across different design platforms. Keysight's latest solution, the Chiplet PHY Designer, offers advanced simulation capabilities for high-bandwidth digital chiplets, specifically targeting AI and data center applications. The tool now supports UCIe 2.0 and introduces support for BoW, enabling pre-silicon verification and simplifying the design-to-manufacture process. Suk Lee, Vice President and General Manager of the Intel Foundry Ecosystem Technology Office, commented, “Our collaboration with Keysight EDA on EMIB-T silicon bridge technology is a vital step towards advancing high-performance packaging solutions. By integrating standards like UCIe 2.0, we enhance the flexibility of chiplet design, accelerate innovation, and ensure that customers can precisely meet next-generation requirements.” Niels Faché, Vice President and General Manager of Keysight’s Design Engineering Software, noted, “Keysight EDA’s innovative Chiplet PHY Designer continues to redefine pre-silicon verification, allowing chiplet designers to quickly and accurately validate their designs. By actively embracing evolving standards like UCIe 2.0 and BoW, and providing strong support for Intel Foundry’s EMIB-T technology, we help engineers accelerate innovation and eliminate costly redesigns pre-manufacture.” Keysight will demonstrate its EMIB-T process, including system-level link performance and compliance verification, at the Intel Foundry Direct Connect event in San Jose on April 29th, highlighting Intel Foundry’s EMIB-T capabilities. Industry experts view this collaboration as a significant step toward standardizing semiconductor technology and offering more efficient and reliable validation tools for complex chiplet designs. This advancement is expected to further accelerate innovation in AI and data center sectors. Keysight Technologies is a leading provider of test, measurement, and verification solutions, widely used in various markets including communications, industrial automation, aerospace and defense, automotive, and semiconductor. Intel Foundry, as a top-tier wafer fabrication service provider, focuses on delivering advanced technologies and solutions to enable leadership in high-performance computing and storage.