Baya Systems, Imagination Technologies, and Andes Technology Present Heterogeneous Computing Architecture at RISC-V CON Silicon Valley On April 29, 2025, Baya Systems, Imagination Technologies, and Andes Technology will co-present a technical session titled "Unlocking the Power of Heterogeneous Computing" at the Andes RISC-V CON Silicon Valley conference, held at the DoubleTree by Hilton hotel in San Jose, California. This session runs from 3:30 PM to 4:30 PM on Tuesday and focuses on optimizing real-time interactions between CPUs and GPUs to enhance performance in AI and edge computing tasks. The meeting aims to explore advanced memory hierarchy, bandwidth allocation, and latency management techniques that can improve frame rendering, AI inference efficiency, and distributed computing in edge environments. The speakers will share research findings and practical experiences that provide insights throughout the design process, from concept to deployment, ensuring that the architecture remains flexible and meets the demands of modern workloads. Key Participants and Their Contributions Dr. Eric Norige (Chief Software Architect, Baya Systems): Emphasizes the complexity of modern workloads and the need for system architecture flexibility. He highlights that by analyzing subsystem interactions and designing intelligent cache and memory hierarchies, significant performance gains can be achieved in AI and graphics domains without overcomplicating hardware. Pallavi Sharma (Director of Product Management, Imagination Technologies): Expresses excitement about collaborating with Baya Systems and Andes Technology. She states that combining GPU expertise with system-level insights helps developers create efficient and scalable RISC-V platforms tailored to modern needs. Marc Evans (Business Development and Marketing Director, Andes Technology): Points out the importance of workload-specific and intelligent SoC design strategies as RISC-V adoption grows. These strategies are central to the conference's agenda. Technical Highlights Design Principles: The session will delve into how to achieve optimal interaction between CPU and GPU, including the intelligent design of memory hierarchies and flexible bandwidth allocation. Performance Optimization: Strategies for enhancing SoC performance through early and continuous insights provided by software platforms, without additional hardware costs. Real-world Applications: Case studies and success stories showcasing the practical applications of heterogeneous computing in AI and graphics-intensive tasks. Interested developers can register for the event on Eventbrite. The meeting serves as a platform for presenting cutting-edge heterogeneous computing technologies and aims to help developers understand and apply these technologies, thereby fostering innovation and development in AI and edge computing. Intel Unveils Next-Gen Software-Defined Vehicle (SDV) SoC Roadmap at 2025 Shanghai Auto Show During the 2025 Shanghai Auto Show in April, Intel announced its roadmap for its next-generation SDV SoCs, marking a significant step into the automotive ecosystem. The new SoC models, based on the Panther Lake design, will be succeeded by chips derived from the Nova Lake line. This strategic move underscores Intel's commitment to high-performance automotive computing. Key Facts Event: Announcement at the 2025 Shanghai Auto Show. Second Generation SoC: Codenamed Frisco Lake, this SoC reportedly enhances AI performance by 10 times and improves energy efficiency by 61% compared to existing products. Technology Basis: Frisco Lake utilizes Intel's leading 18A process node and the Xe3 (Celestial) GPU, reinforcing its connection to the Panther Lake series. Future Plans: Grizzly Lake, expected to be Intel's third-generation SDV SoC, will launch its high-performance variant, Monument Peak, in the first half of 2027. Monument Peak will support up to 32 cores and a 7 TFLOPS integrated Xe GPU. Development Timeline Q4 2024: The Malibou Lake platform, based on Raptor Lake, will debut with up to 14 cores (6 performance cores + 8 efficiency cores), 24MB L3 cache, and support for eight cameras, catering to ADAS, autonomous driving, and in-car entertainment systems. 2025: Frisco Lake, an unexpected addition to the roadmap, will enhance Intel's presence in the automotive computing market. H1 2027: Grizzly Lake's Monument Peak SoC will be released, offering higher core counts and superior graphical capabilities, potentially setting a new standard for high-performance automotive computing. Industry Challenges and Strategies Despite x86 architecture's dominance in desktop markets, its application in automotive sectors has been limited due to stringent power constraints, real-time processing requirements, and safety considerations. However, the growing demand for ADAS, autonomous driving, and enhanced in-car experiences has opened new opportunities for Intel. By adapting consumer-grade architectures to the automotive domain, Intel aims to bridge gaps in the mobile and AI markets and establish a robust footprint in vehicle computing. Industry Insider Evaluation Experts see Intel's foray into automotive chip markets as a critical component of its diversification strategy. Although the automotive sector demands rigorous validation processes and longer chip lifecycle management, Intel's extensive technological and manufacturing prowess positions it as a strong contender. If the new SoCs meet their performance targets and are timely delivered, Intel could become a major player in automotive computing. Additionally, 3elife reports suggest that Intel plans to update its automotive SoCs annually, signaling an aggressive and forward-thinking approach. Company Profiles Baya Systems: Specializes in high-performance, modular semiconductor systems. Its soft and hardware design platform aims to enhance computational efficiency while reducing costs and supporting innovations across various industries. Imagination Technologies: A UK-based company focusing on parallel processing technologies. Its efficient GPU intellectual property is widely used in millions of devices globally. Andes Technology: A founding senior member of the RISC-V International organization, leading in commercial CPU IP. Its product range spans from low-power 32-bit CPUs to high-performance 64-bit multicore processor clusters. Both events highlight the importance of collaboration and innovation in driving technological advancements, with heterogenous computing architecture and automotive SoCs poised to play crucial roles in their respective fields. The insights and strategies shared at these conferences are expected to guide future developments and address the unique challenges faced in these industries.