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Astrus Raises $8M to Advance AI-Powered Microchip Design with Physics-Aware Technology

Astrus, the AI startup developing the world’s first physics-aware foundation model for chip design, has announced it has raised $8 million USD in funding. The round was led by Khosla Ventures, with additional participation from Pradeep Sindhu, founder of Juniper Networks, as well as 1517 Fund, Drive Capital, Alumni Ventures, and other strategic investors. While digital chip design has become increasingly automated over the past decade, the analog portion of advanced semiconductors continues to pose significant challenges. Designing analog circuits requires deep expertise in physics, materials science, and electrical engineering, and traditionally involves time-consuming manual processes that limit innovation and slow down production timelines. Astrus aims to transform this landscape by leveraging artificial intelligence to model the physical behavior of chips at a fundamental level. Its foundation model is trained on vast datasets of semiconductor physics and design rules, enabling it to predict performance, power consumption, and reliability with high accuracy—before any physical prototype is built. By integrating physics-aware AI into the design workflow, Astrus helps engineers explore more design options faster, reduce errors, and accelerate time-to-market for next-generation chips. The company believes its technology can play a pivotal role in advancing AI accelerators, high-performance computing systems, and custom silicon for emerging applications like robotics, autonomous vehicles, and edge AI. The new capital will be used to expand the team, enhance the AI model’s capabilities, and strengthen partnerships with semiconductor manufacturers and EDA (electronic design automation) tool providers. With the global chip industry facing growing complexity and rising R&D costs, startups like Astrus are emerging as key enablers of innovation. By combining deep technical expertise with cutting-edge AI, the company is positioning itself at the forefront of a new era in semiconductor design.

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