Cadence has launched a new partner ecosystem to accelerate the development and time to market of chiplet-based designs, particularly for applications in physical AI, data centers, and high-performance computing. The initiative, built around the Cadence Physical AI chiplet platform, brings together key industry players including Arm, Arteris, eMemory, M31 Technology, Silicon Creations, Trilinear Technologies, and silicon analytics firm proteanTecs. The collaboration enables customers to access pre-validated, pre-integrated IP solutions that reduce engineering complexity and lower risk. A key component of the ecosystem is a joint silicon prototype effort with Samsung Foundry, using the SF5A process technology. This prototype demonstrates the Cadence Physical AI chiplet platform with integrated partner IP, including the Arm Zena Compute Subsystem, UCIe 32G, and LPDDR5X, and has already been fully silicon-validated. The platform features spec-driven automation that generates chiplet framework architectures combining Cadence’s own IP with third-party components. These include chiplet management, security, and safety features, all supported by advanced EDA tools. The design flow enables seamless logic simulation with Xcelium and high-speed emulation with Palladium Z3, while real-time feedback during place-and-route improves efficiency. The resulting chiplet designs are standards-compliant, supporting Arm Chiplet System Architecture and the upcoming OCP Foundational Chiplet System Architecture. Cadence’s Universal Chiplet Interconnect Express (UCIe) IP ensures industry-standard die-to-die connectivity, while a broad portfolio of protocol IP supports cutting-edge interfaces like LPDDR6/5X, DDR5-MRDIMM, PCIe 7.0, and HBM4. This allows for rapid integration of high-performance, future-ready interfaces. The partnership with Arm focuses on advancing physical and infrastructure AI applications, with the Arm Zena CSS and other IP enhancing the platform’s capabilities for edge AI in automotive, robotics, and drones, as well as for data center and HPC I/O and memory chiplets. Other partners bring specialized capabilities: Arteris provides high-bandwidth, scalable NoC solutions; eMemory offers secure OTP memory for long-term key storage; M31 delivers automotive-grade MIPI interface IP; proteanTecs enables real-time telemetry for system reliability; Silicon Creations contributes high-performance clocking solutions; and Trilinear Technologies supplies advanced DisplayPort IP for high-speed video connectivity. David Glasco, vice president of the Compute Solutions Group at Cadence, said the ecosystem marks a major step in chiplet adoption, helping customers achieve performance, cost efficiency, and design flexibility while reducing complexity and risk. The initiative builds on Cadence’s long-standing relationships with industry leaders and reflects a strategic push to support the growing demand for scalable, secure, and interoperable multi-die systems.