Recent die shots of AMD's 16-core Zen 5c CCD, used in the company's latest EPYC 9005 series server processors, have been unveiled, offering a clear glimpse into the architectural changes from the previous Zen 4c generation. The images, shared by HXL on social media platform X, reveal a distinctive layout: a long row of two banks of cores with a 32MB L3 cache situated in the middle. The Zen 5c CCD measures 5.7 mm by 14.83 mm, which is notably longer and narrower than the vanilla Zen 5 CCD, which measures 7.4 mm by 11.26 mm. This elongated design allows AMD to fit 16 cores on a single CCD while ensuring they all share a unified L3 cache. This marks a significant departure from the dual-CCX design found in Zen 4c, where cores in different CCXs had to communicate through the Infinity Fabric, increasing latency. By transitioning to a single-CCX design, AMD aims to enhance core-to-core communication and reduce L3 cache latency. This change is expected to bring performance improvements similar to those seen when AMD first introduced the single-CCX design in the Ryzen 5000 series. The Ryzen 5000 series demonstrated notable advancements in latency-sensitive applications, particularly in gaming, where the unified L3 cache played a crucial role. The EPYC 9005 series processors, which feature Zen 5c cores, can be configured with up to 12 of these new elongated CCDs, arranged around a large I/O die in the center. Models in this series start with 72 cores and a 400W TDP, and the lineup culminates with the flagship EPYC 9965, which boasts 192 cores and a 500W TDP. Zen 5c represents AMD's second generation of compact cores, designed to offer the same IPC performance and feature set as the vanilla Zen 5 architecture but in a 25% smaller package. These compact cores are AMD's equivalent to Intel's E-cores, which are used to complement the performance cores (P-cores) in Intel's hybrid architecture. However, AMD's approach is unique in that the Zen 5c cores utilize the same architecture as their larger counterparts, rather than a completely different design like Intel's P-cores and E-cores. This architectural choice not only optimizes space but also ensures consistent performance and compatibility across different core configurations. For server applications, the single-CCX design in Zen 5c could lead to more efficient and powerful processors, addressing the growing demand for high-performance, low-latency computing in data centers and other demanding environments.