MIPS I8500 Processor Launches with RISC-V Power for Real-Time AI Data Orchestration in Edge and Physical AI Applications

MIPS, a GlobalFoundries company, has announced the sampling of its new MIPS I8500 processor, a next-generation data movement processor IP designed for the demands of the AI era and the rise of Physical AI. The processor, unveiled at GlobalFoundries’ Technology Summit in Munich, Germany, features a third-generation four-thread-per-core architecture built on the open RISC-V instruction set architecture (ISA), delivering deterministic, secure, and high-performance data orchestration for real-time, event-driven computing platforms. Targeting hyperscale data centers, storage systems, automotive, industrial automation, and communications infrastructure, the I8500 is engineered to handle the complex data flows required by AI workloads at the edge and in physical environments. “As AI transitions from the datacenter into real-world applications, platforms need real-time data orchestration far beyond what traditional processors can provide,” said Sameer Wasson, CEO of MIPS. “The I8500 represents a major evolution of our data movement architecture into the open RISC-V era, offering unmatched performance, efficiency, and design flexibility for the next generation of Physical AI solutions.” The I8500’s scalable multithreaded design supports up to 24 threads per cluster across multiple clusters, enabling high-throughput, low-latency processing. Its architecture is optimized for deterministic data movement, making it ideal for orchestrating packet flows across AI accelerators and facilitating intelligent communication between compute blocks, humans, and networks. The processor’s energy-efficient design ensures strong performance for edge AI workloads, while support for Linux and Real-Time Operating Systems, along with RVA23 profile readiness, ensures seamless software integration and ecosystem compatibility. Steven Dickens, CEO and Founder of HyperFRAME Research, praised the I8500 as a strategic advancement for embedded and edge computing. “The combination of scalable multithreading, deterministic performance, and secure data orchestration directly addresses the growing need for real-time processing in automotive, industrial automation, and telecom infrastructure. MIPS is clearly positioning itself as a key enabler of Physical AI at the silicon level.” Key applications of the I8500 include high-speed data orchestration for Smart NICs, Data Processing Units (DPUs), and backhaul processors in data centers and telecom networks; real-time protocol processing for industrial IoT and automation; secure, scalable data movement for predictive maintenance and AI-driven diagnostics; and flexible deployment in 5G/6G and edge computing environments. The processor also supports dynamic traffic management, encryption, and Quality of Service (QoS) through programmable pipelines, ensuring secure and efficient communication. Customers can now evaluate the I8500 Atlas Explorer Core Model, enabling co-design of hardware and software to accelerate development cycles and reduce time to market. The processor will be featured at the RISC-V Summit North America on October 22–23, with more information available at MIPS.com. MIPS, a GlobalFoundries company, specializes in processor IP for edge and embedded computing platforms, built on a 40-year legacy of RISC innovation and safety-critical processing. With a foundation in the open, modular RISC-V ISA, MIPS is driving the evolution of Physical AI in industries ranging from industrial robotics to automotive systems.