Intel Unveils EMIB-T: Boosting HBM4 Integration and Advanced Chip Packaging Capabilities
Intel recently unveiled several groundbreaking advancements in chip packaging technology at the Electronic Components Technology Conference (ECTC). The new technologies—primarily focused on EMIB-T, a disaggregated heat spreader design, and an innovative thermal bonding technique—are poised to enhance performance, efficiency, and scalability in advanced processors, particularly those supporting high-bandwidth memory (HBM4/4e) and increased Universal Chiplet Interconnect Express (UCIe) bandwidth. At the forefront of these developments is EMIB-T, an evolution of Intel’s Embedded Multi-Die Interconnect Bridge (EMIB) technology. EMIB-T integrates through-silicon vias (TSVs) into the existing EMIB framework. This new approach significantly improves power delivery and reduces voltage droop, which was a challenge with the previous EMIB design due to its cantilevered power delivery path. By incorporating TSVs, EMIB-T creates a direct, low-resistance path for power delivery from the bottom of the chip package, essential for the high power requirements of HBM4/4e memory. Moreover, EMIB-T not only boosts power efficiency but also increases die-to-die communication bandwidth, potentially reaching speeds up to 32 Gbps or higher. The addition of high-powered MIM capacitors in the bridge ensures consistent communication signaling despite the increased noise from combined power and signal routing. Intel’s paper highlights that EMIB-T can support larger chip packages, up to 120x180mm, with more than 38 bridges and over 12 reticle-sized die in a single package. The technology also supports pitches far finer than the current 45 microns, with 35-micron pitches expected soon and 25-micron pitches under development. The growing demands of artificial intelligence (AI) have pushed the boundaries of chip package sizes and power consumption, leading to significant cooling challenges. To address these issues, Intel introduced a new disaggregated heat spreader technique. This method breaks the traditional monolithic heat spreader into a flat plate and a stiffener, improving the coupling between the heat spreader and the thermal interface material (TIM). The result is a reduction of voids in solder TIM coupling by up to 25%, which enhances cooling efficiency. Intel’s illustrations show a heatspreader with integrated micro-channels that can directly carry liquid through the top of the package to cool the processor, capable of handling thermal design power (TDP) up to 1000W. This multi-faceted approach to cooling underscores Intel’s commitment to tackling the thermal challenges of advanced processors. Another critical advancement is Intel’s new thermal compression bonding process for large package substrates. This technique addresses the problem of die and substrate warpage during the bonding process, which can cause yield and reliability issues. By minimizing the thermal delta between the substrate and the die, the new process improves these metrics and enables the production of much larger chip packages. This innovation is particularly beneficial for EMIB-T, as it helps achieve even finer pitches, further dense connections, and increased package sizes. These chip packaging innovations are essential for Intel’s Foundry Services, aimed at providing comprehensive chip production solutions for both internal and external clients. Advanced chip packaging allows for the integration of diverse components, such as CPUs, GPUs, and memory, from multiple vendors into a single package, thereby reducing risks associated with transitioning to Intel’s process nodes for all elements. Intel also offers packaging services for chips that do not use any Intel-fabricated components, fostering relationships with new customers and expanding its market reach. Notably, Intel Foundry’s external customer base includes industry leaders like Amazon Web Services (AWS) and Cisco, as well as government initiatives such as RAMP-C and SHIP. The packaging contracts serve as a quick revenue generator for Intel Foundry, as producing chips using leading-edge process nodes involves longer lead times and higher investments. Industry experts have praised Intel’s latest packaging advancements for their potential to drive innovation in chip design and performance. These breakthroughs position Intel at the forefront of packaging technology, critical for maintaining competitiveness against rivals like TSMC. As AI and high-performance computing continue to advance, the ability to integrate and manage complex chiplets and memory will become increasingly vital. Intel’s focus on power delivery, cooling, and reliability improvements is likely to bolster its standing in the chip manufacturing and foundry services sectors.